yuanjing/pile_com_stm32
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新板子修改IO口

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snow 2023-07-20 13:51:10 +08:00
parent 416a4b5730
commit c78198c985
3 changed files with 48 additions and 27 deletions
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72
main/main.c
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@ -31,9 +31,9 @@
If you'd rather not, just change the below entries to strings with If you'd rather not, just change the below entries to strings with
the config you want - ie #define EXAMPLE_WIFI_SSID "mywifissid" the config you want - ie #define EXAMPLE_WIFI_SSID "mywifissid"
*/ */
#define EXAMPLE_ESP_WIFI_SSID CONFIG_ESP_WIFI_SSID #define EXAMPLE_ESP_WIFI_SSID CONFIG_ESP_WIFI_SSID
#define EXAMPLE_ESP_WIFI_PASS CONFIG_ESP_WIFI_PASSWORD #define EXAMPLE_ESP_WIFI_PASS CONFIG_ESP_WIFI_PASSWORD
#define EXAMPLE_ESP_MAXIMUM_RETRY CONFIG_ESP_MAXIMUM_RETRY #define EXAMPLE_ESP_MAXIMUM_RETRY CONFIG_ESP_MAXIMUM_RETRY
#if CONFIG_ESP_WIFI_AUTH_OPEN #if CONFIG_ESP_WIFI_AUTH_OPEN
#define ESP_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_OPEN #define ESP_WIFI_SCAN_AUTH_MODE_THRESHOLD WIFI_AUTH_OPEN
@ -60,7 +60,8 @@ static EventGroupHandle_t s_wifi_event_group;
* - we are connected to the AP with an IP * - we are connected to the AP with an IP
* - we failed to connect after the maximum amount of retries */ * - we failed to connect after the maximum amount of retries */
#define WIFI_CONNECTED_BIT BIT0 #define WIFI_CONNECTED_BIT BIT0
#define WIFI_FAIL_BIT BIT1 #define WIFI_FAIL_BIT BIT1
#define GPIO_4G_PWR GPIO_NUM_4
static const char *TAG = "main"; static const char *TAG = "main";
@ -69,7 +70,7 @@ static int s_retry_num = 0;
extern void wifi_init_softap(void); extern void wifi_init_softap(void);
void ads1220_init(void); void ads1220_init(void);
void PWR_4G_Init(void);
extern void can_init(void); extern void can_init(void);
extern void FLOW_init(); extern void FLOW_init();
extern void DEPTH_init(); extern void DEPTH_init();
@ -83,26 +84,47 @@ uint32_t rtc_clk_apb_freq;
void app_main(void) void app_main(void)
{ {
//Initialize NVS // Initialize NVS
esp_err_t ret = nvs_flash_init(); esp_err_t ret = nvs_flash_init();
if (ret == ESP_ERR_NVS_NO_FREE_PAGES || ret == ESP_ERR_NVS_NEW_VERSION_FOUND) { if (ret == ESP_ERR_NVS_NO_FREE_PAGES || ret == ESP_ERR_NVS_NEW_VERSION_FOUND)
{
ESP_ERROR_CHECK(nvs_flash_erase()); ESP_ERROR_CHECK(nvs_flash_erase());
ret = nvs_flash_init(); ret = nvs_flash_init();
} }
ESP_ERROR_CHECK(ret); ESP_ERROR_CHECK(ret);
ESP_ERROR_CHECK(i2c_master_init()); ESP_ERROR_CHECK(i2c_master_init());
config_load(); config_load();
ESP_LOGI(TAG, "ESP_WIFI_MODE_STA"); ESP_LOGI(TAG, "ESP_WIFI_MODE_STA");
rtc_clk_apb_freq = rtc_clk_apb_freq_get(); rtc_clk_apb_freq = rtc_clk_apb_freq_get();
ESP_LOGI(TAG, "rtc_clk_apb_freq=%d", rtc_clk_apb_freq); ESP_LOGI(TAG, "rtc_clk_apb_freq=%d", rtc_clk_apb_freq);
wifi_init_softap(); wifi_init_softap();
// wifi_init_sta(); // wifi_init_sta();
// can_init(); // can_init();
PWR_4G_Init();
ModBusTCPSlave_init(); ModBusTCPSlave_init();
ads1220_task_start(); // test succeed ads1220_task_start(); // test succeed
BL0939_init(); // test succeed BL0939_init(); // test succeed
DEPTH_init(); DEPTH_init();
FLOW_init(); FLOW_init();
uart0_modbus_slave_init(); uart0_modbus_slave_init();
} }
void PWR_4G_Init(void)
{
// zero-initialize the config structure.
gpio_config_t io_conf = {};
// disable interrupt
io_conf.intr_type = GPIO_INTR_DISABLE;
// set as output mode
io_conf.mode = GPIO_MODE_OUTPUT;
// bit mask of the pins that you want to set,e.g.GPIO18/19
io_conf.pin_bit_mask = GPIO_4G_PWR;
// disable pull-down mode
io_conf.pull_down_en = 0;
// disable pull-up mode
io_conf.pull_up_en = 0;
// configure GPIO with the given settings
gpio_config(&io_conf);
gpio_set_level(GPIO_4G_PWR, 0);
}

1
main/stm32/ads1220.c
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@ -390,7 +390,6 @@ extern int flow_rem[2];
void ads1220_task(void) void ads1220_task(void)
{ {
uint32_t io_num; uint32_t io_num;
u32 data;
static uint32_t ad_flow_tick = 10; static uint32_t ad_flow_tick = 10;
while (1) while (1)
{ {

2
main/stm32/capture.c
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@ -34,7 +34,7 @@ static uint32_t cap_val_end_of_flow1 = 0;
static uint32_t cap_val_begin_of_flow2 = 0; static uint32_t cap_val_begin_of_flow2 = 0;
static uint32_t cap_val_end_of_flow2 = 0; static uint32_t cap_val_end_of_flow2 = 0;
static xQueueHandle cap_queue; // static xQueueHandle cap_queue;
extern uint32_t rtc_clk_apb_freq; extern uint32_t rtc_clk_apb_freq;
uint32_t volatile t15_ccr[2]; uint32_t volatile t15_ccr[2];
uint16_t volatile t15_ccr_times[2]; uint16_t volatile t15_ccr_times[2];