354 lines
9.1 KiB
C
354 lines
9.1 KiB
C
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#ifndef _2515_H
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#define _2515_H
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/*
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** Register offsets into the transmit buffers.
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*/
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#define TXBnCTRL 0
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#define TXBnSIDH 1
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#define TXBnSIDL 2
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#define TXBnEID8 3
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#define TXBnEID0 4
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#define TXBnDLC 5
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#define TXBnD0 6
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#define TXBnD1 7
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#define TXBnD2 8
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#define TXBnD3 9
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#define TXBnD4 10
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#define TXBnD5 11
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#define TXBnD6 12
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#define TXBnD7 13
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#define CANSTAT 14
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#define CANCTRL 15
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#define SIDH 0
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#define SIDL 1
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#define EID8 2
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#define EID0 3
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/*
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** Register offsets into the receive buffers.
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*/
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#define RXBnCTRL 0
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#define RXBnSIDH 1
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#define RXBnSIDL 2
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#define RXBnEID8 3
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#define RXBnEID0 4
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#define RXBnDLC 5
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#define RXBnD0 6
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#define RXBnD1 7
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#define RXBnD2 8
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#define RXBnD3 9
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#define RXBnD4 10
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#define RXBnD5 11
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#define RXBnD6 12
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#define RXBnD7 13
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/*
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** Bits in the TXBnCTRL registers.
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*/
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#define TXB_TXBUFE_M 0x80
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#define TXB_ABTF_M 0x40
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#define TXB_MLOA_M 0x20
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#define TXB_TXERR_M 0x10
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#define TXB_TXREQ_M 0x08
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#define TXB_TXIE_M 0x04
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#define TXB_TXP10_M 0x03
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#define DLC_MASK 0x0F
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#define RTR_MASK 0x40
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#define TXB0CTRL 0x30
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#define TXB0SIDH 0x31
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#define TXB1CTRL 0x40
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#define TXB1SIDH 0x41
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#define TXB2CTRL 0x50
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#define TXB2SIDH 0x51
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#define TXPRIOHIGH 0x03
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#define TXPRIOHIGHLOW 0x02
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#define TXPRIOLOWHIGH 0x01
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#define TXPRIOLOW 0x00
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#define TXB_EXIDE_M 0x08 // In TXBnSIDL
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#define TXB_RTR_M 0x40 // In TXBnDLC
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#define RXB_IDE_M 0x08 // In RXBnSIDL
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#define RXB_RTR_M 0x40 // In RXBnDLC
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#define BFPCTRL 0x0C
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#define B2RTS 0x20
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#define B1RTS 0x10
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#define B0RTS 0x08
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#define B2RTSM 0x04
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#define B1RTSM 0x02
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#define B0RTSM 0x01
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#define TEC 0x1C
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#define REC 0x1D
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#define CLKCTRL CANCTRL
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#define RXF0SIDH 0
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#define RXF0SIDL 1
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#define RXF0EID8 2
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#define RXF0EID0 3
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#define RXF1SIDH 4
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#define RXF1SIDL 5
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#define RXF1EID8 6
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#define RXF1EID0 7
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#define RXF2SIDH 8
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#define RXF2SIDL 9
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#define RXF2EID8 10
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#define RXF2EID0 11
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#define RXF3SIDH 16
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#define RXF3SIDL 17
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#define RXF3EID8 18
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#define RXF3EID0 19
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#define RXF4SIDH 20
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#define RXF4SIDL 21
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#define RXF4EID8 22
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#define RXF4EID0 23
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#define RXF5SIDH 24
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#define RXF5SIDL 25
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#define RXF5EID8 26
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#define RXF5EID0 27
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#define RXF_EXIDE_M 0x08
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#define RXM0SIDH 0x20
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#define RXM1SIDH 0x24
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#define CNF3 0x28
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#define CNF2 0x29
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#define CNF1 0x2A
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#define CANINTE 0x2B
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#define CANINTF 0x2C
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#define EFLG 0x2D
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#define TXRTSCTRL 0x0D
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#define EFLG_RX1OVR 0x80
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#define EFLG_RX0OVR 0x40
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#define EFLG_TXBO 0x20
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#define EFLG_TXEP 0x10
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#define EFLG_RXEP 0x08
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#define EFLG_TXWAR 0x04
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#define EFLG_RXWAR 0x02
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#define EFLG_EWARN 0x01
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#define SJW1 0x00
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#define SJW2 0x40
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#define SJW3 0x80
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#define SJW4 0xC0
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#define BTLMODE_CNF3 0x80
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#define SAMP1 0x00
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#define SAMP3 0x40
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#define SEG1 0x00
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#define SEG2 0x01
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#define SEG3 0x02
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#define SEG4 0x03
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#define SEG5 0x04
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#define SEG6 0x05
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#define SEG7 0x06
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#define SEG8 0x07
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#define BRP1 0x00
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#define BRP2 0x01
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#define BRP3 0x02
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#define BRP4 0x03
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#define BRP5 0x04
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#define BRP6 0x05
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#define BRP7 0x06
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#define BRP8 0x07
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#define IVRIE 0x80
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#define WAKIE 0x40
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#define ERRIE 0x20
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#define TX2IE 0x10
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#define TX1IE 0x08
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#define TX0IE 0x04
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#define RX1IE 0x02
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#define RX0IE 0x01
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#define NO_IE 0x00
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#define IVRINT 0x80
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#define WAKINT 0x40
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#define ERRINT 0x20
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#define TX2INT 0x10
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#define TX1INT 0x08
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#define TX0INT 0x04
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#define RX1INT 0x02
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#define RX0INT 0x01
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#define NO_INT 0x00
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#define RXB0CTRL 0x60
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#define RXB1CTRL 0x70
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#define RXB_RXRDY 0x80
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#define RXB_RXM1 0x40
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#define RXB_RXM0 0x20
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#define RXB_RX_ANY 0x60
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#define RXB_RX_EXT 0x40
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#define RXB_RX_STD 0x20
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#define RXB_RX_STDEXT 0x00
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#define RXB_RXMx_M 0x60
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// #define RXB_RXIE_M 0x10
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#define RXB_RXRTR 0x08 // In RXBnCTRL
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#define RXB_BUKT 0x04
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#define RXB_BUKT_RO 0x02
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#define RXB_FILHIT 0x01
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#define RXB_FILHIT2 0x04
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#define RXB_FILHIT1 0x02
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#define RXB_FILHIT_M 0x07
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#define RXB_RXF5 0x05
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#define RXB_RXF4 0x04
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#define RXB_RXF3 0x03
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#define RXB_RXF2 0x02
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#define RXB_RXF1 0x01
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#define RXB_RXF0 0x00
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#define CLKEN 0x04
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#define CLK1 0x00
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#define CLK2 0x01
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#define CLK4 0x02
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#define CLK8 0x03
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#define MODE_NORMAL 0x00
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#define MODE_SLEEP 0x20
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#define MODE_LOOPBACK 0x40
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#define MODE_LISTENONLY 0x60
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#define MODE_CONFIG 0xE0
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#define ABORT 0x10
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#define RECEIVE_BUFFER(x) (0x60 + 0x10 * (x))
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#define TRANSMIT_BUFFER(x) (0x30 + 0x10 * (x))
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#define RESET 0xc0 // Reset internal registers to default state, set conf mode
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#define RTS 0x80 // Trigg transmission
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#define RD_STAT 0xA0 // Start reading status
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#define BIT_MOD 0x05 // Bit modify command data == MASK, BITS
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#define READ 0x03 // Read data from memory
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#define WRITE 0x02 // Write data to memory
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#define STATUS 0xa0
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#define LED0_ON(fd) mcp_wr_bit(fd, BFPCTRL, 0Xff, 0x10)
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#define LED1_ON(fd) mcp_wr_bit(fd, BFPCTRL, 0Xff, 0x20)
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#define LED0_OFF(fd) mcp_wr_bit(fd, BFPCTRL, 0X00, 0x10)
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#define LED1_OFF(fd) mcp_wr_bit(fd, BFPCTRL, 0X00, 0x20)
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typedef struct
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{
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uint32_t Id; /*!< Specifies the standard identifier.
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This parameter can be a value between 0 to 0x7FF. */
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uint8_t IDE; /*!< Specifies the type of identifier for the message that
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will be received. This parameter can be a value of
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@ref CAN_identifier_type */
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uint8_t RTR; /*!< Specifies the type of frame for the received message.
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This parameter can be a value of
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@ref CAN_remote_transmission_request */
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uint8_t DLC; /*!< Specifies the length of the frame that will be received.
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This parameter can be a value between 0 to 8 */
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uint8_t FMI; /*!< Specifies the index of the filter the message stored in
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the mailbox passes through. This parameter can be a
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value between 0 to 0xFF */
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uint8_t Data[8]; /*!< Contains the data to be received. It ranges from 0 to
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0xFF. */
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} CanRxMsg;
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typedef struct
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{
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uint32_t Id; /*!< Specifies the standard identifier.
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This parameter can be a value between 0 to 0x7FF. */
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uint8_t IDE; /*!< Specifies the type of identifier for the message that
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will be transmitted. This parameter can be a value
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of @ref CAN_identifier_type */
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uint8_t RTR; /*!< Specifies the type of frame for the message that will
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be transmitted. This parameter can be a value of
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@ref CAN_remote_transmission_request */
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uint8_t DLC; /*!< Specifies the length of the frame that will be
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transmitted. This parameter can be a value between
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0 to 8 */
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uint8_t Rsv;
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uint8_t Data[8]; /*!< Contains the data to be transmitted. It ranges from 0
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to 0xFF. */
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} CanTxMsg;
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#define CAN_Id_Standard ((uint32_t)0x00000000) /*!< Standard Id */
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#define CAN_Id_Extended ((uint32_t)0x00000004) /*!< Extended Id */
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#define CAN_ID_STD CAN_Id_Standard
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#define CAN_ID_EXT CAN_Id_Extended
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#define CAN_EFF_FLAG 0x80000000U // 扩展帧的标识
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#define CAN_RTR_FLAG 0x40000000U // 远程帧的标识
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#define CAN_ERR_FLAG 0x20000000U // 错误帧的标识，用于错误检查
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// extern void mcp_cs(int fd);
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// extern void mcp_ncs(int fd);
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int spi_write(int fd, uint8_t *spi_txbuf, int len);
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int spi_write_read(int fd, uint8_t *spi_txbuf, uint8_t *spi_rxbuf, int len);
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// void mcp_rd_can ( unsigned char buffer, unsigned char * ext, unsigned long* can_id,unsigned char * dlc, unsigned char * rtr, unsigned char * data );
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// void mcp_wr_can_id ( unsigned char mcp_addr,unsigned long);
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// unsigned long mcp_rd_can_id ( unsigned char mcp_addr);
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void mcp_wr_can_id(int fd, unsigned char, unsigned int);
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unsigned int mcp_rd_can_id(int fd, unsigned char);
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void mcp_reset(int fd);
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unsigned char mcp_rd(int fd, unsigned char);
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void mcp_rds(int fd, unsigned char, unsigned char *, unsigned char);
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void mcp_wr(int fd, unsigned char, unsigned char);
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void mcp_wrs(int fd, unsigned char, unsigned char *, unsigned char);
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unsigned char mcp_rd(int fd, unsigned char);
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void mcp_write_tbuf(int fd, unsigned char value);
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// void mcp_write_can (unsigned char buffer, unsigned char ext, unsigned long can_id,
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// unsigned char dlc, unsigned char rtr, const unsigned char * data );
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void mcp_transmit(int fd, unsigned char buffer);
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// void mcp_init(int fd);
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void mcp_write(int fd, unsigned char MCPaddr, const unsigned char *writedata, unsigned char length);
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void mcp_ld_txbuf(int fd, unsigned char buf, unsigned char *DAT, unsigned char length);
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void rts(int fd, unsigned char);
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void mcp_wr_bit(int fd, unsigned char add, unsigned char DAT, unsigned char mask);
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unsigned char get_mcp_rxstatus(int fd);
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void mcp_rd_rxbuf(int fd, unsigned char buf, unsigned char *DAT, unsigned char length);
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// uint8_t spi_write(uint8_t *data, uint8_t length);
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// uint8_t spi_read(uint8_t *data, uint8_t length);
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// uint8_t spi_write_read(uint8_t *wdata, uint8_t wlen, uint8_t *rdata, uint8_t rlen);
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typedef struct can_config
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{
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uint32_t baud_rate;
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uint8_t rx_ctrl[2];
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uint16_t can_mode;
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uint32_t rx_mask[2];
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uint32_t rx_filter[6];
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} can_config_t;
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struct can_status
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{
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uint8_t bus_status;
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uint8_t status;
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uint16_t rx_cnt;
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uint16_t tx_cnt;
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};
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int mcp_can_init(int ch, can_config_t *cfg);
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int can_tx_pack(int ch, CanTxMsg *TxPack);
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int can_read_rxbuf(int ch, CanRxMsg *RxMsg);
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unsigned char get_mcp_status(int fd);
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#endif |