104 lines
3.7 KiB
C++
104 lines
3.7 KiB
C++
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/*
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* Distributed under the Boost Software License, Version 1.0.
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* (See accompanying file LICENSE_1_0.txt or copy at
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* http://www.boost.org/LICENSE_1_0.txt)
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*
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* Copyright (c) 2009 Helge Bahmann
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* Copyright (c) 2009 Phil Endecott
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* Copyright (c) 2013 Tim Blechmann
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* ARM Code by Phil Endecott, based on other architectures.
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* Copyright (c) 2014, 2020, 2022 Andrey Semashev
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*/
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/*!
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* \file atomic/detail/caps_arch_gcc_arm.hpp
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*
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* This header defines feature capabilities macros
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*/
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#ifndef BOOST_ATOMIC_DETAIL_CAPS_ARCH_GCC_ARM_HPP_INCLUDED_
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#define BOOST_ATOMIC_DETAIL_CAPS_ARCH_GCC_ARM_HPP_INCLUDED_
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#include <boost/atomic/detail/config.hpp>
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#include <boost/atomic/detail/platform.hpp>
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#ifdef BOOST_HAS_PRAGMA_ONCE
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#pragma once
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#endif
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#if defined(__ARMEL__) || \
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(defined(__BYTE_ORDER__) && defined(__ORDER_LITTLE_ENDIAN__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__) || \
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(defined(__LITTLE_ENDIAN__) && !defined(__BIG_ENDIAN__)) || \
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defined(BOOST_WINDOWS)
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#define BOOST_ATOMIC_DETAIL_ARM_LITTLE_ENDIAN
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#elif defined(__ARMEB__) || \
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defined(__ARM_BIG_ENDIAN) || \
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(defined(__BYTE_ORDER__) && defined(__ORDER_BIG_ENDIAN__) && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__) || \
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(defined(__BIG_ENDIAN__) && !defined(__LITTLE_ENDIAN__))
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#define BOOST_ATOMIC_DETAIL_ARM_BIG_ENDIAN
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#else
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#include <boost/predef/other/endian.h>
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#if BOOST_ENDIAN_LITTLE_BYTE
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#define BOOST_ATOMIC_DETAIL_ARM_LITTLE_ENDIAN
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#elif BOOST_ENDIAN_BIG_BYTE
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#define BOOST_ATOMIC_DETAIL_ARM_BIG_ENDIAN
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#else
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#error "Boost.Atomic: Failed to determine ARM endianness, the target platform is not supported. Please, report to the developers (patches are welcome)."
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#endif
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#endif
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#if defined(__GNUC__) && defined(__arm__) && (BOOST_ATOMIC_DETAIL_ARM_ARCH >= 6)
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#if BOOST_ATOMIC_DETAIL_ARM_ARCH > 6
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// ARMv7 and later have dmb instruction
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#define BOOST_ATOMIC_DETAIL_ARM_HAS_DMB 1
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#endif
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#if defined(__ARM_FEATURE_LDREX)
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#if (__ARM_FEATURE_LDREX & 1)
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#define BOOST_ATOMIC_DETAIL_ARM_HAS_LDREXB_STREXB 1
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#endif
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#if (__ARM_FEATURE_LDREX & 2)
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#define BOOST_ATOMIC_DETAIL_ARM_HAS_LDREXH_STREXH 1
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#endif
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#if (__ARM_FEATURE_LDREX & 8)
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#define BOOST_ATOMIC_DETAIL_ARM_HAS_LDREXD_STREXD 1
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#endif
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#else // defined(__ARM_FEATURE_LDREX)
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#if !(defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || defined(__ARM_ARCH_6Z__))
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// ARMv6k and ARMv7 have 8 and 16-bit ldrex/strex variants, but at least GCC 4.7 fails to compile them. GCC 4.9 is known to work.
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#if (__GNUC__ * 100 + __GNUC_MINOR__) >= 409
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#define BOOST_ATOMIC_DETAIL_ARM_HAS_LDREXB_STREXB 1
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#define BOOST_ATOMIC_DETAIL_ARM_HAS_LDREXH_STREXH 1
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#endif
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#if !(((defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6ZK__)) && defined(__thumb__)) || defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7M__))
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// ARMv6k and ARMv7 except ARMv7-M have 64-bit ldrex/strex variants.
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// Unfortunately, GCC (at least 4.7.3 on Ubuntu) does not allocate register pairs properly when targeting ARMv6k Thumb,
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// which is required for ldrexd/strexd instructions, so we disable 64-bit support. When targeting ARMv6k ARM
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// or ARMv7 (both ARM and Thumb 2) it works as expected.
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#define BOOST_ATOMIC_DETAIL_ARM_HAS_LDREXD_STREXD 1
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#endif
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#endif // !(defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || defined(__ARM_ARCH_6Z__))
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#endif // defined(__ARM_FEATURE_LDREX)
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#endif // defined(__GNUC__) && defined(__arm__) && (BOOST_ATOMIC_DETAIL_ARM_ARCH >= 6)
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#define BOOST_ATOMIC_INT8_LOCK_FREE 2
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#define BOOST_ATOMIC_INT16_LOCK_FREE 2
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#define BOOST_ATOMIC_INT32_LOCK_FREE 2
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#if defined(BOOST_ATOMIC_DETAIL_ARM_HAS_LDREXD_STREXD)
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#define BOOST_ATOMIC_INT64_LOCK_FREE 2
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#endif
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#define BOOST_ATOMIC_POINTER_LOCK_FREE 2
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#define BOOST_ATOMIC_THREAD_FENCE 2
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#define BOOST_ATOMIC_SIGNAL_FENCE 2
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#endif // BOOST_ATOMIC_DETAIL_CAPS_ARCH_GCC_ARM_HPP_INCLUDED_
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